The
input
stage consists of a couple of general purpose small signal
transistors which are
arranged as a longtail pair amp, (differential pair amp), with a low
noise BC109 as a constant
current
source for the common emitter circuit. The two halves of the LTP have
some local
current FB via the 47 ohm
emitter resistors, R11,12. The LTP is quite linear in its operation,
and it only needs to
generate up to about 1Vrms of signal at each collector to produce full
power at the output.
The
output
stage uses four 2SK134 N type Hitachi output mosfets which are
fed with a +35
volt 3 amp supply. There is a wide bandwidth output transformer using
C-cores, about the
same size as a 50 watt OPT on a tube amp to couple the mosfets to the
load.
The OPT has a
ratio of 35:5 ohms, and has thicker wire than a tube amp in the
primary,
and has a 5P x 6S interleaving pattern to give 300kHz at the -3dB
HF cut off pole. The dual
C-cores have a small air gap to reduce the effective µ
to about 2,200 to prevent saturation
effects below 16Hz at full power. Since mosfets can generate much
higher peak current than
any tube, the
option of air gapping the PP core resulted in much reduced current
spikes below
16Hz at full power.
This opened my mind to using "partially gapped" cores for any PP
transformer. With modern
GOSS core material the µ of the core may be much
higher than it needs to be. In 1955, most
grain oriented E&I laminations when maximally
interleaved had a maximum µ = 5,000.
But I have often found GOSS lams which have max µ = 17,000. (
µ is permeability )
This means that the material saturates easily if the dc in each half of
the primary is unbalanced,
or there are stray low frequency signals across the primary. Toroidal
cores can have µ = 40,000.
C-cores made with the same modern material I have seen would also give
a very high µ if the joins
between C have been polished.
So a reduction of effective µ may well substantially reduce the
primary inductance which shunts
the RL in parallel with device output resistance, but the primary
inductance in some OPT
is far
more than it needs to be. In the mosfet amp, the drain to drain
resistance is many times the load
value, just as pentode Ra-a is more than the primary load value, and as
a rule of thumb, reactance
in ohms of
primary inductance should at least equal RL at 14Hz in a PP amp, to
that whatever is
powering the load, mosfet,
pentode, tetrode, bjt, triode etc will experience a decline in RL of
0.7
x the RL at 1khz at 14Hz. If there is
no saturation before clipping at 14Hz, the OPT is well
designed. In SE amps, usually good amps have ZLp = RL
at 20Hz, lest the OPT weigh a tonne.
Modern GOSS I use with E&I lams maximally intermeshed will give a
µ max = 17,000, and it
could be 1,700
without causing any loss of response at bass frequencies above 14 Hz.
E&I lams
may be given partial gapping by arranging all the Es in
sub-packs of say 10 pcs all facing the
same way. Each pack of 10 is then inserted into the bobbin hole for
cores in
alternating directions.
Sub-stacks of 10 Is are then packed in between each pack of Es. But to
get it right, experiments
and measurements have to be made. C-cores can more easily be gapped by
inserting a peice of
thin plastic
sheet between C and with some varnish prior to clamping the cores
tightly. Again,
never assume anything until you have measured it properly. The effect
of the reduction of µ
is to ensure the primary
inductance keeps working as an inductance across the load to F below
14Hz. One does not want the core to suddenly saturate at 10Hz and
become a
virtual short circuit
once saturation occurs. Such saturation will all too easily cause solid
state devices to fail.
Each
mosfet
has an idle current of about 0.8 amps, and with a +34Vdc supply
the Pd
is 27.2 Watts, (like an EL34).
This is the reliable continuous limit for a TO3 package device IMHO.
The drain to drain load
is 35 ohms, so each half of the PP circuit has a 17.5 ohm load in class
A so each
mosfet "sees"
a class A load of 35 ohms. There is a class A peak current swing in
each mosfet of up to +/- 0.80
amps.
The voltage swing at each drain is about 35 x 0.80 = 28Vpeak = 20Vrms
so each mosfet produces
11.4 Watts in pure class A which makes a total
of 45W in class A for the 4 mosfets. This would be
with a 5 ohm load at the OPT secondary. But the negative going drain
voltage swing could be
slightly greater
even with a load much less than 5 ohms. So absolute maximum class AB PO
is about 70W for a load less than 4
ohms. For all loads above 6 ohms the power is all pure class
A, and the
general overall performance is similar to a quad of EL34.
The
mosfets
are biased in their negative temperature coeficient region
which means that if they
heat up the bias current tends to reduce. Unlike power transistors,
they don't run away
thermally due to the
positive temp coefficient. Therefore the mosfets may have have truly
fixed bias set by the
resistive divider of R21/R22, 32k and 1k, providing about +1volt bias
to the gates via the 68 k bias
resistors. There is cap coupling from the driver stage and because
there are only
two stages in the is amp, the stability at LF is excellent. At gross
overload, the
caps charge up like they do on a tube amp, and
the mosfets are driven into a temporary
state of harmless cut off. This only occurs when the power exceeds the
clipping level, so
there is
no need to worry about the effect under normal operation, just as is
the case with
a
good tube amp. The 7.5 volt back-to-back zeners control the applied
voltages to the
output stage.
In practice, for hi-fi use the amp has no bad habits due to the cap
coupling. The gate input
impedance of the mosfets is extremely high like the
grids of a tube and hence CR couping
is a very effective coupling method and just
because solid state devices are used there is no
reason why direct coupling must be used as
in the much more powerful '2 x 300W' amp
mentioned elsewhere at this website. The low frequency stability is not
compromised since
there are so few
consecutive stages. The use of the OPT does not permit direct coupling
of
the mosfets to
the speaker load so the failure of a mosfet will not connect the
internal DC
supply to
any speaker connected. No protection circuit is needed apart from fuses.
Each
mosfet
under the above operating condition acts with a similar
distortion profile to a
good beam tetrode. But at low power they are surprisingly linear. Since
mosfets do not
use current to drive them and are voltage operated
devices, they can be thought of like tubes.
In this application, I measured the mosfets to have :-
Amplification factor, µ = 180,
Dynamic drain resistance, Rd = 220
Ohms, and
Transconductance, gm = 0.8 amps per
volt.
The calculation of gain is the same as for a tube.
Voltage
gain = µ x
RL
= 180 x
17.5
= 24.7 in this case.
RL + Rd
17.5 + 220
The
mosfets
are set up like pentode tubes in the circuit and have their
load connected in the
drain circuit. The effective drain to drain source resistance with the
0.22 ohms
measures about 260 ohms
for the four mosfets together. Since the OPT has an impedance ratio of
35 to 5 ohms, or 7 : 1, the
Rd-d is transformed down to 260/7 = 37 ohms at the speaker output
terminals which is far to high
to
drive speakers effectively. With a secondary load = 5 ohms, DF = 5 / 37
= 0.135 which is a poor DF.
It is very similar to the case where 2 x EL34 are set up in class A
pentode with an OPT. Ra-a is higher,
but so is the OPT RL, and the Rout at the secondary is
still many times the load resistance.
To
ensure
the speaker crossover filters work as intended and that the
speaker response remain
+/- 1dB across the AF band, all amplifiers should have a DF of 10 which
means if the speaker
is 5 ohms the amp should have Rout = 0.5 ohms.
There are 3 feedback loops in the PP50 mosfet amps.
The
first
two are Balanced Shunt Feedback loops from the primary of the OPT
( the mosfet drain
connections ) back to the collector circuit of the
LTP driver transistors via the 22k shunt feedback
resistors, R16/R19. Since the voltage at the gate is -0.9v for +20v at
the drain, the
current in the
22 k R is nearly 1mA and the load the driver transistors effectively
see is only 900 ohms because
RL = V / I = 0.9V / 0.001A = 900 ohms.
The
driver
stage has a gain determined approximately by its gm x RL. The
driver stage transistors
form a balanced signal current source because of the high collector
resistance.
If
there
is a reduction in mosfet gain say due to a lower load being used
the effective load seen by
the driver stage increases. For example, if the load is halved
from 5 ohms to 2.5 ohms at the output
then 0.9Vrms applied to the mosfet gates would produce only 10Vrms at
each drain instead of
20Vrms. The current flow through the shunt FB resistors would reduce to
nearly half, so the load
seen by driver stage would
nearly double in ohm value and because voltage gain of the driver stage
is about proportional to its
RL, a larger voltage would try to appear at the driver collectors
immediately
with the higher load value. Hence the
mosfet drain to drain output voltage would tend to be maintained
regardless of load values at the OPT
secondary.
So
any
drop in gain of the mosfets due say to a drop in load value will be
compensated for and in
fact with just these two balanced loops of shunt NFB the Rout is
reduced from 37 Ohms to about
1 ohm at the output. Any distortion voltage appearing at the
mosfet drain will be divided by the
22k and 4.7k collector dc supply resistors, R16 / R10. ß, the
fraction fed back = 4.7 / ( 4.7 + 22 ).
If the thd at a drain was +0.1Vrms, then +0.0176Vrms is being applied
at the gate. This is amplified
about 20 times by the mosfet to produce -0.352Vrms. This subtracts from
the distortion voltage
of +0.452Vrms which must
have been present without NFB applied. The amount of locally applied
shunt NFB is effectively about 13 dB.
In
actual
fact the dual shunt FB loops applied around each pair of output
mosfets acts similarly
to the electrostatic shunt feedback acting inside the triode, except I
am using resistances
to apply
the local feedback.
I
doubt
that anyone understood a single word of what I just tried to say
simply in a few paragraphs
about shunt NFB. So let me see if you get the message any clearer when
i try to confuse
you further
with a diagram of a basic shunt NFB loop with single 2SK134 driven by a
an ordinary small signal
npn bjt.
Unfortunately, I cannot explain things like amplifiers any more simply
because they simply contain a lot
things all interacting simultaneously, and to know, you must look,
because if you don't look yer won't know!
Fig2. Model of SE mosfet amp with shunt
FB.
In
the
Fig2 schematic, I have drawn up the bjt and mosfet as equivalent
voltage generator models with
a triangle to represent an internal low output resistance voltage
generator with a phase
inverting output
of gm x Rc or gm x Rd. Rc = bjt collector resistance, about 50k,
and Rd = mosfet drain
resistance =
220 ohms.
From
observed
working Vrms voltages measured across half my amp circuit, I
was able to draw the Fig2
single ended model to explain the working of the circuit. The
transistor acts like a low resistsance
voltage generator with gain = 1,000 and collector resistance of 50k.
Because Rc is a much higher
resistance than the loads connected to the
collector, it is virtually an active current source.
The presence of an emitter resistor, Re, of 50 ohms will have
considerable effect on the Rout at
the point of the triangle which is the generator output. The generator
does not actually exist, nor do
the voltages at the
output of the gene, but the gene is a good "imaginery equivalent model"
to use for
basic
devices because the actual devices work "as if the above model were
real".
The collector resistance acts like a series R between gene and the
load, and the actual collector terminal
C is shown above Rc, 50k.
At
this
point C in this case, the effective output resistance of the bjt
set up as shown is 100k.
Now
the
model for the 2SK134 mosfet is similar, with a triangle gene
producing an output of Vg-s x gm x Rd.
The 0.22 source resistor is shown. The load of 35 ohms has + 20Vrms
signal.
Instaneous
phases
of the relative signal phases are shown with + or - signs. To
analyse the operation
of the circuit and draw all the current flows around it, one can start
with the load
current and work
backwards towards the input. This analysis is the most basic type of
current flow lesson that should
be known by anyone building amplifiers. The
input signal produced by the input bjt circuit is from a
100k sourse
resistance.
The
collector
of the bjt has a dc supply resistance which is a load on the
collector in parallel with
the biasing R for the gate of the mosfet. The two parallel load
RLs are shown
as one R, R1FB = 4k4.
The R2FB is the resistor from the collector C to the drain
connection of the mosfet, D.
Consider
the
network of R1FB and R2FB and let us suppose we measure a
distortion voltage +0.2D
appears at the mosfet drain output due to the mosfet's tendency to add
harmonics not in the input signal.
This signal produces a current flow back towards the input of the amp
via R2FB in series with R1FB
in parallel with the effective Rout of the
bjt output resistance of 100k. So we have a total series
resistance = 22k + 100k//4k4 = 22k + 4.2k =
26.2k. From Ohm's law we can say that distortion
current flow = 0.2 / 26.2 =
0.00763mA. It doesn't sound like much current, but it is there. So the
VD at the gate, G, in our circuit = Id x 4.2k = 0.00763 x 4.2k =
+0.032V. This voltage is amplified
by the mosfet gain which must include the
effect of the source R of 0.22 ohms. This gain = 21.4.
If
there
is VD at the gate = +0.032V, then at the drain it must become
-21.4 x 0.032V = - 0.7V.
It is a negative phased voltage. But how can this be because we started
off saying we measured +0.2V
at the drain to begin with?
Well, the mosfet without NFB was already making a considerably larger
+VD distortion voltage for
the +20Vrms output level if there was no NFB resistance network
present. But when an additional
-VD is added to a larger initial value of +VD, we get a resultant +VD =
+0.2VD.
So commonsense tells us that the VD with NO NFB must have been 0.9V
without any NFB.
Add the feedback loop, and viola, Vd reduces from +0.9V to +0.2V.
This
reduction
amounts to about 13dB of NFB.
The
term
Shunt voltage NFB is because the inverted output voltage signal is
directly fed back by resistance
divider to oppose the input signal of an amp.
Series
voltage
NFB is the more commonly used NFB in most amplifiers and the
resistor dividers apply
a fed back signal to a point in the input circuit which has the
same phase as the input, and so the FB is
"in series" with the input sugnal which always must be a higher
amplitude than the FB signal.
In
the
case of the emitter resistor in the bjt circuit and source R in the
mosfet circuit there is Series
current NFB where there is a voltage generated by the output load
current flowing
in a resistor and
which appears in series to the input base or gate signal.
If
we
return to the workings of the PP50 mosfet amp, the global FB network is
a sample of "series
voltage NFB." Those of you with real
understanding so far could see that a loop of global series
voltage NFB could be added by connection of a
resistance between the 35ohm output load signal
and the emitter resistance of the bjt input device.
The
bjt
in the modelling shows that the current in the bjt and its 50k of
Rc is equal to the total of
currents in R1FB and R2FB, and = 1.167 mA. Since the voltage change at
G = 0.935V, the load
seen by the collector
at point C = 0.935 / 1.167 = 0.8k ohms. A small signal input transistor
like
this has in effect a load of 800
ohms with an emitter R = 50 and its gain is 0.935 / 0.176V = 5.31,
reduced from 0.935 / 0.059 = 15.8 without the
Re. Re of 50 ohms gives substantial local negative
current FB to the input
transistor and improves overall linearity. The Re value sets the gain
and
sensitivity of the input transistor
which must suit the amount of applied global NFB as seen in the
PP50 amp schematic.
Of
course
just ONE 2SK134 set up with supply = +34Vdc and Id = 0.8 amps. We would
get
about 10.5 Watts into 42 ohms. The operating
point of 34V x 0.8A gives 27.2 watts of idle dissipation.
This is a safe figure to begin with. In his 'Zen' amps, Nelson
Pass has a single
mosfet with supply
of +17V with 3Adc idle current giving Pd = 51 Watts dissipation. Power
output was supposed to be
17
Watts. A friend of mine tried to build a 'Zen' and after smoking 3
expensive
IRF mosfets due
to inexplicable "smoke and silence" events he gave up and has never
found the time to learn
more and complete the amp.
Take
my
word for it, 30 Watts is the absolute limit for idle dissipation in
any class A flat pack
or TO3 devices !!!!!
The
operating
condition suits a 35 ohm load and gives the mosfet plenty of
gain and moderate
THD compared to where one may have lower +Vdc supply and higher Idc to
suit a lower
load
value. For parallel SE operation and with +25V supply, and with idle
Idc = 1
amp dc in each mosfet,
4 mosfets for class A are needed to give 44 watts, and load would be
5.6 ohms. One might use a
very decent choke to feed 4 amps dc to the mosfets,
then have 10,000 uF capacitor from drain to
speaker load.
If
one
runs the mosfet with +20V supply, then Ia can be 1.25A for 25 watts
dissipation and
you can get about 9.4W into 12ohms, or with two mosfets, 18.8W into 6
ohms and so
on,
but mosfet gain is much less at only 9.6 with a 12 ohm load so the
shunt NFB is less effective.
In
the
PP50 I found the noise was still a little high, and so I applied 12
dB of global loop
feedback from the secondary of the OPT back to the second available
input of the
LTP,
and the Rout fell to a satisfactory 0.2 Ohms, and the noise vanished,
and the THD was less
than 0.2% at a dB below clipping, and declining
towards zero as the output power was reduced.
There is absolutely ZERO crossover
distortion.
The
amp
needed zobel networks across the collectors of the driver LTP, and
across each half
of the OPT to shelve the HF gain and control phase shift in exactly the
same
manner as a
tube amp would need. The OPT has a full power bandwidth from 10Hz to
300kHz, ( yes,
not a
typo, it is 300kHz ) but this much bandwidth cannot be used, and to
control overshoot
on
square waves with capacitor loads above 40 kHz the shelving networks
were employed
and so the final finished bandwidth is a more sensible 10Hz to 65kHz.
About
99.9%
of mainstream solid state amps will not use an OPT. I have proved to
myself at
least that they can be used effectively and
my mosfet amp has the ability to get a good load
match even to 4 ohms, and still get class A
sound, and loads of it. Since all the output
devices are NPN types with the same part number,
the even order distortion of the devices
on each side of the PP circuit cancel almost perfectly. The circuit
doesn't need an intermediary
high gain voltage
amplification stage. Instead of having a single phase of drive signal
applied
to a
complementary PP pair of PNP and NPN devices, the two output phases of
the input
differential amp are both used. The difference between PNP and NPN
devices when in
common source mode
is substantial, equivalent to having an EL34 on one side of a tube
PP amp and a 6L6GC on the other; it does
not give the best outcome.
Improvements
to
the amplifier may result by using a pair of matched darlington pairs
for the
input/driver LTP, which would increase their local open
loop gain and linearity considerably,
and increase the input impedance of the amp slightly.
But
after
having used 2SK369 j-fets in phono stages I have wanted to use 3
of these for
the input LTP and CCS to make the amp a totally "fet amplifier." The
2SK369 is exactly
the same as 2SK147 ( which is no longer made by
Hitachi ) except slightly lower Pd rating.
It has high input impedance and gm = 40mA / V at 5mA of idle current
and would suit this
application perfectly. They are very low noise devices, much quieter
than any bjt with the
same idle current. I'm still looking for the time to change over to
full fet topology....
Most
tube
amps have simple circuits, and the simplest will use just four
active elements,
the two tubes of the output stage and a pair of input tubes to give the
driver stage some gain
and provide a balanced drive to the output tubes. Quad-II is a sample
of what I mean.
Most
modern
50 watt SS amps will have up to 25 active elements all doing
their thing
simultaneously ( in theory ) to produce the sound. I wanted to keep to
using 4
elements.
The CCS tail of the LTP could be considered a fifth element, but its
action is really passive
and part of the power supply and its function is to provide a
constant current to the diff
amp emitter circuit. The circuit has very good CMRR, so there is no
need for any better
regulation of the supply voltages than the simple zeners shown.
The
drain
supply part of the power supply uses two 4,700 uF input caps where
about 0.7
Vrms of ripple voltage is produced by 3 amps of DC
draw. Then there is a low DC resistance
choke of 15 mH using thick wire which
then feeds 3 x 15,000 uF caps in parallel. The
ripple voltage at the CT is thus
reduced 1/269 times to only 2.6 mV which is low enough
so that if loads below 4 Ohms are used then the crossover to class AB
will be unmolested
by power supply
ripple entering the amp.
The
voltage
supplies for the driver stage are higher than the main drain
supply at +/- 65 volts
and this allows for regulation down to suitable lower
voltages at low current for the class A
driver amp to work from. The amp is not troubled by wide
variations in the mains voltages.
The
heatsink
for the amp was DIY from various pieces of heavy angle section
of aluminium
I had picked up over the years. I needed something which could easily
dissipate 100 Watts
continuously.
I found that placing all four mosfets close together on an angle which
then
connected to the main body of the sink means that the centre part of
the sink gets
warmer
than the ends but nevertheless the devices stay cool enough. The heat
sink I used is 350
mm long, 120 high, with 20 fins 70 mm x 120
x 1.6 mm thick. The fins and bars used in
the heatsink were just bolted together with
plenty of white heat conductive paste between
mating surfaces.
The
secret
for a good heatsink is to have plenty of fin area, have vertical
fins to allow air to
flow easily upwards as it warms and to have the sink exposed to a clear
air
flow. The Quad
405 used this idea well with an external heatsink that is
large and rugged. Anyone building
such an amp could use a ready made extruded
heatsink. There are standard extruded heatsinks
available which are 300mm long, 150mm high, with 30
fins 40mm long by 2mm thick
which are good for about 100 Watts dissipation without a fan but to be
sure the 200mm
high sink would be the best. Sugden class A SS amps show how not to do
it properly
by having their
heatsinks with the fins flat and running horizontal and with poor
access
to devices. Boy they get
hot during Australia's summer weather!
The
extruded
heatsink with one flat side allows for simple bolting of
flatpack mosfets more
easily than all the fiddling I went to mount a quad of TO3 on an angle
shelf in the middle
of the amp. The angle is 6mm thickness so there was much drilling.
In
the
other mosfet based stereo amp with 350 watts per channel
capability, each channel
draws 40 watts at idle, which barely warms the amp. For each channel,
it uses a the
extruded heat sink 300 mm long, 150 mm
high, with 30 fins 40 mm x 150 mm x 2 mm
thick, and I placed the 6 mosfets
evenly spaced along the sink and thus the temperature
is lower and evenly spread right along the
sink. There is room for two more mosfets
at each end of the sink if need be.
During
the
years I have used these amps, nobody has complained about the sound
which not many people can distinguish from tube amps in AB testing when
the
speakers are switched from a class A tube amp to the mosfet amp.
Over longer
testing periods, I would say the tubes still have a slight lead.
Should one
want to use no inductors or OPT and settle for a complementary pair PP
output stage and driver stage very similar to the 2X300W AB stereo amp,
then with
3 NPN and 3 PNP mosfets
and supply rails at +/-22V and idle current = 2.27Adc,
then you would have only 16.6W of
dissipation per device, and still be able to
to get a +/- 4.5amp peak current swing into 4 ohms for 40 watts of
class A, ie, 12.6Vrms.
The power into all loads above 4 ohms will be pure class A but limited
by the available
voltage swing of about +/- 20 peak volts maximum.
If the 6
complementary mosfets are in source follower mode which is probably the
only practical way to drive them then the gate drive is a single
ended
drive signal
maximum of about 16Vrms.
The solid
state drive amp will always produce more THD than the source follower
output stage. A class A source follower output stage can give less
than
0.4% THD at
full power into 6 ohms, and zero crossover distortion, and Rout < 1
ohm, so without
any global
NFB the output stage is as good as many tube amps with 20dB of global
NFB.
I am sure the brighter mortals amoung you will tailor your diy efforts
to suit yourselves
without smoke and give your ears good music.
There are
1,001 ways to build an amplifier.
This shows the
inside of the 50 watt monos. The psu torodial power transformer
and choke are towards the left behind two 4,700uF caps, circuit board
in the centre,
more psu caps and 5Kg OPT with C cores at the rear right.